1. Field of the Invention
This invention relates to an electro-luminescence display (EL) display panel, and more particularly to an EL display panel and a driving method thereof that are adaptive for preventing a life shortening of the EL caused by a direct current (DC).
2. Description of the Related Art
Recently, there have been highlighted various flat panel display devices reduced in weight and bulk that is capable of eliminating disadvantages of a cathode ray tube (CRT). Such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence (EL) display panel, etc.
The EL display panel of such display devices is a self-luminous device capable of light-emitting a phosphorous material by a re-combination of electrons with holes. The EL display device is generally classified into an inorganic EL device using an inorganic compound as the phosphorous material and an organic EL device using an organic compound as it. Such an EL display panel can be driven a low driving voltage (e.g., 10V) unlike other display devices, and has an excellent recognition because it employs a self-luminescence. Also, the EL display panel can implement an ultra thin film device because it does not need a back light unlike the LCD. Furthermore, the EL display panel has advantages of a wider viewing angle and a faster response speed in comparison to the LCD such that it can be highlighted into a post-generation display device.
The organic EL device is usually comprised of an electron injection layer, an electron carrier layer, a light-emitting layer, a hole carrier layer and a hole injection layer that are disposed between a cathode and an anode. In such an organic EL device, when a predetermined voltage is applied between the anode and the cathode, electrons produced from the cathode are moved, via the electron injection layer and the electron carrier layer, into the light-emitting layer while holes produced from the anode are moved, via the hole injection layer and the hole carrier layer, into the light-emitting layer. Thus, the electrons and the holes fed from the electron carrier layer and the hole carrier layer emit a light by their re-combination at the light-emitting layer.
An active matrix EL display panel employing such an organic EL device is largely classified into an analog driving method and a digital driving method.
The analog driving method of the EL display panel is a driving method that controls a current amount fed to an EL cell by an analog signal having a different level in accordance with a video data signal, that is, by a voltage or current, thereby controlling brightness.
On the other hand, the digital driving method of the EL display panel is a driving method that controls a light-emitting time of the EL cell according to a digital video data signal, thereby controlling brightness. In this case, in order to control a light emitting period of the EL cell, one frame is divided into 1st to 6th sub-frames SF1 to SF6 when it is intended to a plurality of sub-frames corresponding to each bit of video data, that is, 6-bit video data as shown in FIG. 1. Further, since different weighting values are given to light-emitting periods of the 1st to 6th sub-frames SF1 to SF6, a ratio LT1:LT2:LT3:LT4:LT5:LT6 of the light-emitting periods of the 1st to 6th sub-frames SF1 to SF6 becomes 1:2:4:8:16:32. The 1st to 4th sub-frames SF1 to SF4 other than the 5th and 6th sub-frames SF5 and SF6 includes non-light-emitting periods UT1, UT2, UT3 and UT4 that are gradually decreased in opposition to the light-emitting periods LT1, LT2, LT3 and LT4. The EL cells arranged in a matrix type at the EL display panel are scanned, on a line sequence basis, in each light-emitting period LT1 to LT6 of the 1st to 6th sub-frames SF1 to SF6 to be turned on in accordance with a data signal, thereby providing a light-emission. On the other hand, the EL cells are scanned, on a line sequence basis, in each non-light-emitting period UT1 to UT4 of the 1st to 4th sub-frames SF1 to SF4 to be turned off, thereby stopping a light-emission. Accordingly, brightness of the EL device is implemented by combining light-emitting times of the sub-frames turned on in accordance with video data.
FIG. 2 is a detailed circuit diagram of one pixel configuring an active matrix EL display panel for providing a digital driving. FIG. 3 is a driving timing diagram of the first sub-frame SF1.
The pixel shown in FIG. 2 is comprised of an EL cell OLED, and a cell driver including three PMOS transistors P1, P2 and P3 and a storage capacitor Cs for driving the EL cell OLED.
The cell driver includes a storage capacitor Cs connected to a power line PL, a first switching PMOS transistor P1 connected between a data line DL and the storage capacitor Cs to be controlled by a light-emitting scan line SLp, a second switching PMOS transistor P2 connected between the power line PL and the storage capacitor Cs to be controlled by a non-light-emitting scan line SLe, and a third driving PMOS transistor P3 connected between a voltage supply line VDD and the EL cell OLED to be controlled by the storage capacitor Cs.
A writing scan line SLp provides a writing signal, that is, a program signal PS for turning on the first PMOS transistor P1 in a light-emitting period LT of each sub-frame SF. The first PMOS transistor P1 is turned on by the program signal PS to charge a data signal into the storage capacitor Cs, thereby turning on or off the third PMOS transistor P3 in accordance with the charged voltage during the light-emitting period LT.
An erasing scan line SLe provides an erasing signal ES for turning on the second PMOS transistor P2 in a non-light-emitting period UT of each sub-frame SF. The second PMOS transistor P2 is turned on by the erasing signal SE to discharge the storage capacitor Cs, thereby turning on the third PMOS transistor P3 during the non-light-emitting period UT.
Referring to FIG. 3, the first PMOS transistor P1 is turned on by a low voltage of the program signal PS in the non-light-emitting period LT1 of the 1st sub-frame SF1. Further, a low voltage (“0”) or a high voltage (“1”) of the data signal is supplied via the turned-on first PMOS transistor P1 to be charged in the storage capacitor Cs. When the low voltage is charged in the storage capacitor Cs, the third PMOS transistor P3 is turned on to thereby turn on, that is, light-emit the EL cell OLED during the light-emitting period LT. On the other hand, when the high voltage is charged in the storage capacitor Cs, the third PMOS transistor P3 does not turn off, that is, light-emit the EL cell OLED during the light-emitting period LT.
Then, the second PMOS transistor P2 is turned on by a low voltage of the erasing signal SE in the non-light-emitting period UT1 to supply a high-level voltage VDD from the power line PL to a gate electrode of the third PMOS transistor P3, thereby discharging the storage capacitor Cs. Thus, the third PMOS transistor P3 is turned off, thereby allowing the EL cell OLED to be turned off, that is, to provide a non-light-emission in the non-light-emitting period UT.
However, the related art EL display panel has a problem in that, since it allows a current to be flown only in a forward direction (i.e., anode→cathode) at the EL cell for the purpose of light-emitting the EL cell OLED, a life of the EL cell OLED is shortened due to a direct current (DC).
Furthermore, the EL display panel driven by the digital driving method as shown in FIG. 2 also has a problem in that, since it allows a forward direction current to be flown into the EL cell OLED in accordance with a data signal in the light-emitting period LT while allowing a current to be not flown into the EL cell OLED by floating the anode of the EL cell OLED in the non-light-emitting period UT, a life of the EL cell OLED is shortened due to a direct current (DC).